FEATURES
Hardware
Intel® Stratix® 10 SX FPGA
High-performance, multigigabit serializer/deserializer (SERDES) transceivers up to 26.3Gbps
2,800K logic elements
244Mb of on-chip memory
11,520 digital signal processing (DSP) blocks
Onboard Memory
32GB DDR4 memory with error correction code (4 banks x 8GB)
2GB QSPI flash memory
Interfaces
PCI Express (PCIe) Gen3 x16
USB 2.0 interface for debugging and programming of FPGA and flash memory
2X QSFP+ with up to 100 Gbps support
Form Factor
3/4 length, full height; dual slot
Board Management
Intel MAX® 10 FPGA Baseboard Management Controller (BMC)
Temperature and voltage readout
Platform Level Data Model (PLDM)
Intelligent Platform Management Interface (IPMI 2.0)
Remote Update capabilities for FPGA flash memory and BMC
Root-of-Trust operation
Enables more secure board updates
Helps to prevent loading or executing unauthorized workloads
Provides anti-rollback capability that helps to prevent the execution of old or outdated designs
Helps to prevent unauthorized access to key interfaces and on-board flash
Power Management
Intel® Enpirion® Power Solutions: Intelligent system power management with real-time telemetry and system health monitoring
Software
Acceleration Stack for Intel® Xeon® CPU with FPGAs
FPGA Interface Manager
Open Programmable Acceleration Engine (OPAE)
Design Entry Tools
Intel® Quartus® Prime Pro Edition software
Intel® FPGA SDK for OpenCL™
Accelerator Cards Intel FPGA
Programmable Acceleration Card D5005 for Data Center.
Intel® D5005 FPGA Programmable Acceleration Card (PAC) is a high-performance PCI Express (PCIe)-based FPGA acceleration card for data centers, which supports both inline and lookaside acceleration. Expanding on the Intel® FPGA PAC portfolio, it offers inline high-speed interfaces up to 100Gbps. It provides the performance and versatility of FPGA acceleration and is one of several platforms supported by the Acceleration Stack for Intel® Xeon® CPUs with FPGAs. This acceleration stack provides a common interface for both application and accelerator function developers and includes drivers, application programming interfaces (APIs), and an FPGA Interface Manager. Together with Acceleration Libraries and development tools, the acceleration stack saves developer’s time and enables code reuse across multiple Intel FPGA platforms. The versatile Intel® FPGA PAC D5005 can be implemented in many market segments, such as streaming analytics, video transcoding, financial, artificial intelligence, and genomics. To help protect systems from FPGA-hosted security exploits, the Intel FPGA PAC D5005 features a Root-of-Trust device. This device enables more secure loading of authorized workloads and board updates and enforces policies to help prevent unauthorized access to critical board interfaces and flash memory.
Related products
-
-
-
-
HP Elitebook 820 G3 Business Laptop, 12.5″
Electronics
Reviews
There are no reviews yet.